Random access memories (RAM) can be of the static type (SRAM) or of the dynamic type (DRAM). In the DRAM, power is minimized by storing a charge on a capacitor and continually refreshing this charge. This charge determines the logic state stored in the capacitor memory cell. In a static type bipolar RAM, a logic bit is stored in a latch, and the state of the latch is maintained by continually drawing current through the latch. As the number of memory cells in the memory increases, this current also increases, as compared to the dynamic type RAM.
There are a number of technologies that have been utilized to realize an SRAM. Either MOS technology can be utilized in the form of CMOS, PMOS or NMOS or bipolar technology can be utilized. When utilizing MOS technology with field effect transistors, charge is typically stored on the gates of the transistors in the associated capacitance. This technology, although providing low power consumption, does have some disadvantages in that it is difficult to drive large capacitive loads with MOS transistors. Further, switching speeds are relatively slow as the MOS transistors have a non-linear resistive driving characteristic. In bipolar technology, the transistors have a higher transconductance, thus providing inherently faster operation due to the lower source impedance. One bipolar technology is Emitter Coupled Logic (ECL) which is a current mode logic and provides very low voltage swings, a low speed-power product, and power consumption which is independent of operating frequency.
ECL logic gates and associated storage latches are formed by providing a current source which is selectively connected to various current paths through transistors configured as emitter followers. Current is switched between the various paths in response to a voltage applied to the base of selected transistors. When realizing an SRAM in ECL technology, a latch is incorporated as a memory element in combination with Write logic gates to current switch the latch, and current sensing gates to perform a Read function. Typically, each latch has one or more current sources associated therewith that maintain a static current at all times. The current requirements therefore increase as the number of memory elements increases. This can result in power dissipation as high as two to five watts for a single memory chip.
To accommodate the increasing density of ECL SRAMs, new package technologies have evolved to dissipate the heat. These new packages represent increased product cost at the silicon level which is compounded by cooling costs at the system level. There exists a need for technology that provides increased density without an increased power consumption.